UHS-Lib (Ultra High Speed Library) is designed for high speed application, especially high performance CPU. In the past years, Faraday developed full series of ARM-compliant 32-bit RISC CPU with UHS-Lib and achieve very high operation frequency goal (please refer to the chart below). Innopower library developers also leverage the experience of performance enhancement to create a library with many features dedicated for high speed requirement, such as high-speed flip-flops, pin-swapped cells, and skewed-timing-path cells.

Performance Advantage

*FA626 is a General-Purpose 32-bit RISC processor (ARM Compliant) with MMU, 32KB I-cache, 32KB D-cache, 8KB internal I-SPAD and 8KB internal D-SPAD.

Features

• Rich set of cell funcitons for logic optimization
• Abundant driving strengths for timing closure
• Plenty of functional cells with balanced delay for clock tree design
• Corresponding scan and non-scann flip -flops
• All pins are located on routing grids
• Only transistor gates are driven by input pins for all cells
• Optimized device P/N width ratio
• High-speed flip-flops
• Pin-swapped cells
• Skewed-timing-path cells