This DDR I I/O, DDR II, DDR III PHY and controllers can be used to make high performance DRAM memory interconnections for System-on-Chip (SoC) applications. All these IPs are silicon proven with an operation speed of up to 1Gbps for the DDRII IP and up to 1.5Gbps for the DDRIII PHY and controller. Furthermore, the combo PHY, such as DDR I/II PHY or DDR II/III PHY, will also be available to the end-user.

Highlights

• Compliant with all JEDEC standards
• DDR II operation speed of up to 1G bps
• DDR III operation speed of up to 1.5 Gbps
• Support X16 and X32 DRAMs
• Programmable output driver strength
• Support Built-In Self Test (BIST) and IDDq test modes
• Robust ESD protection and latch-up prevention